Pynq-Z2

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  Manufacturer:  TUL
  Official website:  Visit
  Category:  Single board computer
  Further info:  automated Google search

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Product Description

TUL Pynq-Z2 SBC, based on a Xilinx Zynq SoC (dual-core ARM Cortex-A9), is designed for the Xilinx University Program to support the PYNQ framework (Python Productivity for Zynq; see www.pynq.io) and embedded systems development.


Product Specifications

Manufacturer TUL
SoC Xilinx ZYNQ XC7Z020-1CLG400C
CPU ARM Cortex-A9 (32-bit)
650MHz dual-core
Coprocessors
GPU (graphics):
MCU (real-time):
FPGA (gates): XC7Z020
NPU (neural):
RAM
Size: 512MB
Built-in / external:   Built-in
Type (e.g. DDR3): DDR3
Speed: ?
ECC support:
Internal storage
Size: 16MB
Built-in / optional:   Built-in
Type: quad-SPI flash
Removable storage MicroSD card slot
m.2 interface(s)
m.2 NVMe support
USB host ports 1x
Type: 2.0
USB OTG ports
SATA interfaces
Ethernet interfaces 1x
Type: Gigabit
Wake-on-LAN    Not supported
HDMI ports 2x
Version: ?
Max. resolution: 0 @ 0fps
Audio support:
Composite video (CVBS)
Other display interfaces
(DSI, LVDS, VGA...)
Camera interfaces (CSI, DVP...)
Audio output
Analog outputs:
Via HDMI:   Supported
SPDIF:
I2S: 1x
Audio input
Line inputs: 1x
Mic inputs:
Onboard mic:
IR receiver
Wireless connectivity
WiFi:
Bluetooth:
Broadband:
LoRa:
Other I/O
GPIO: 16x
ADC:
PWM:
SPI:
I2C:
UART:
RS232 (or 485 or 422):
Arduino shield support    Compatible pin header
Raspberry Pi shield support    Compatible pin header
96boards compliance    None
Real time clock (RTC)
Other features
* ZYNQ XC7Z020-1CLG400C:
  -- 650MHz dual-core Cortex-A9 processor
  -- DDR3 memory controller with 8 DMA channels and
  -- High Performance AXI3 Slave ports
  -- High-bandwidth peripheral controllers: 1G Ethernet,
  -- USB 2.0, SDIO
  -- Low-bandwidth peripheral controller:
  -- SPI, UART, CAN, I2C
  -- Programmable from JTAG, Quad -SPI flash, and MicroSD card
  -- Programmable logic equivalent to Artix-7 FPGA
  -- 13,300 logic slices, each with four 6-input LUTs and 8 flip-flops
  -- 630 KB of fast block RAM
  -- 4x clock management tiles, each with a phase-locked loop (PLL) and mixed-mode clock manager (MMCM)
  -- 220 DSP slices
  -- On-chip analog-to-digital converter (XADC)
* Expansion connectors:
  -- 2x standard Pmod ports with 16x total FPGA I/O (8x shared pins with RPi connector)
  -- Arduino Shield connector with 24x total FPGA I/O, 6x single-ended 0-3.3V Analog inputs to XADC
  -- Raspberry Pi connector with 28x total FPGA I/O (8x shared pins with Pmod port)
* Other: 4x push-buttons, 2x slide switches, 4x LEDs, 2x RGB LEDs
Size 87 x 140mm
Weight ?
Power Input voltage: 7 - 15V
Input current: ?
PMIC/PMU
(power management controllers)
?
Lithium battery support ?
Operating temperature ?
Price (USD)
(Note: likely to vary)
$119
Linux support    yes
Android support    yes
Supported Windows OSes
   Not supported (or unknown)
Other supported OSes
   Not supported (or unknown)